Wafer inspection at production line speed. False positives below 0.1%.
Lenspathio's computer vision system runs defect detection on every die, every wafer, every shift — without slowing your throughput.
| Timestamp | Wafer ID | Die | Defect Type | Conf. | FP |
|---|---|---|---|---|---|
| 03:17:42 | W-29A-0471 | X12/Y08 | PASS | — | — |
| 03:17:43 | W-29A-0471 | X13/Y08 | Particle | 0.94 | No |
| 03:17:44 | W-29A-0471 | X13/Y09 | PASS | — | — |
| 03:17:46 | W-29A-0472 | X04/Y14 | Scratch | 0.97 | No |
| 03:17:47 | W-29A-0472 | X05/Y14 | PASS | — | — |
| 03:17:48 | W-29A-0472 | X22/Y03 | Edge Chip | 0.88 | Yes |
| 03:17:49 | W-29A-0473 | X11/Y11 | PASS | — | — |
| 03:17:51 | W-29A-0473 | X19/Y06 | Particle | 0.91 | No |
Third-shift fatigue creates yield loss you can't afford
Human visual inspection degrades 40% on overnight shifts. A single missed scratch defect on a 300mm wafer can scrap $80,000 in product. Lenspathio runs at full line speed — it doesn't fatigue.
At 7nm and below, defect classification precision becomes non-negotiable. Static threshold methods break down. Our per-recipe adaptive calibration stays stable across tool lifetimes.
False-Positive Control MethodologyBuilt for the production line, not the lab
Three integrated subsystems cover every inspection requirement from defect classification to fab equipment communication.
Defect Detection
Convolutional models trained on semiconductor defect libraries — scratches, particles, edge chips, pattern deformations. Classifies and maps to die coordinates.
23 defect typesLine-Speed Throughput
120 wafers/hour without inspection bottleneck. Parallel inference pipeline processes each die frame in under 8ms. No queue backup.
Throughput architectureSECS/GEM Integration
Native SECS/GEM host communication. Pushes defect maps directly to your fab MES without middleware. Qualifies in standard ATC test framework.
Integration guideFalse positives are yield loss disguised as quality
Every false positive pulls a good wafer for re-inspection. At scale, a 2% false-positive rate on 500 wafers/day wastes 10 engineer-hours. Lenspathio's adaptive threshold calibration keeps false positives below 0.1% — verified per recipe per tool.
How We Control False Positives
From 28nm mature node to 3nm leading edge
Inspection sensitivity scales with node — we tune model resolution and threshold profiles per recipe. Pre-qualified recipes ship for common process nodes.
Custom recipe qualification available for non-standard nodes and memory / logic hybrid architectures.
Engineers who have run evaluations
Names and fab identifiers withheld per NDA. Role and facility type provided for context.
"We were seeing 2.4% false positives with our legacy AOI. Lenspathio brought it under 0.08% within three recipe cycles."
"Third-shift inspection parity was the requirement. We validated it against first-shift baseline — detection rates matched within 0.3%."
Engineering documentation for your evaluation
False-Positive Rate Methodology in Automated Wafer Inspection
46-page methodology report covering adaptive threshold calibration, per-recipe validation protocol, and benchmark comparison against human inspectors.
View White PaperSECS/GEM Integration Checklist for 300mm Fab Environments
Step-by-step host communication configuration, ATC qualification procedure, and MES push verification.
View Application NoteEvaluate Lenspathio on your wafer set
We run pilots on customer-provided wafers with your process recipes. Typical evaluation timeline: 3–4 weeks from wafer receipt to full report.