Practical engineering documentation for deployment engineers, integration specialists, and process qualification teams.
Step-by-step HSMS-SS and SECS-II RS-232 host configuration, ATC test sequence execution, event subscription setup, and MES push verification. Organized as a checklist that can be completed by your integration engineer with remote support from Lenspathio's team. Covers passive/active connection mode, GEM state machine verification, and standard alarm event configuration.
Complete qualification procedure for 7nm logic inspection recipes. Covers calibration wafer selection criteria, initial threshold configuration, false-positive review workflow with engineering sign-off checklist, and production sign-off criteria. Includes templates for documentation required by most 300mm fab quality systems.
Data export format specification (CSV and fab-standard KLARF), SPC chart integration, and correlation methodology for aligning inspection defect density with downstream electrical test yield. Covers rolling window statistics, zone-based defect density reporting, and alert threshold configuration for automatic lot hold.
Configuration guide for edge-specific inspection algorithms. Covers notch region handling, exclusion zone configuration, edge chip confidence threshold tuning for different wafer grades (prime, test, monitor), and distinguishing handling artifacts from process-induced edge defects.
All application notes are available to evaluation teams upon request. Include your role and expected integration timeline.