Technology
Four pillars. One production-grade inspection system.
Optical design for semiconductor wavelengths. Deep learning classification trained on synthetic wafer data. Fab-native SECS/GEM integration. On-premises deployment architecture.
DESIGN
LEARNING
NATIVE
DEPLOY
Optical Design
Dual-wavelength illumination: 365nm i-line for standard defect detection, 193nm ArF for advanced nodes below 7nm. Numerical aperture calibrated per process node. No generic industrial camera — purpose-designed optical path for semiconductor wafer inspection.
Node coverageDeep Learning Classification
CNN classifier trained on optical physics-based synthetic wafer images — not generic natural images. Calibrated augmentation pipeline generates training data for each process node's illumination characteristics. Confidence-scored output on every classification decision.
CV architectureFab-Native Integration
SECS/GEM II and GEM 300 protocol stack — the same protocols that all other fab tools use. No custom middleware, no API translation layer. Results flow directly to MES, APC, and AMHS using the equipment communication infrastructure already in place.
Integration detailsDeployment Architecture
On-premises only. Air-gap compatible. EMI-hardened chassis to IEC 61000-6-2. OEM-qualified hardware configurations. No cloud dependency for operation, update, or license validation. Wafer data never leaves the fab network.
Deployment specsTechnical Reference
Specification pages for each pillar
CV Architecture deep-dive
Full CNN architecture, training data approach, inference latency benchmarks, and false positive/negative tradeoff analysis.
ReadProcess node coverage matrix
Node-by-node defect detection capability table — 6 nodes × 5 defect categories with support status and confidence levels.
View matrixSECS/GEM integration guide
Protocol stack details, message set specification, MES handshake architecture, and deployment qualification documentation.
Read guideTechnical questions? Talk to an engineer.
Our team includes process engineers from logic and memory fab backgrounds. If you have specific technical questions about our architecture, evaluation methodology, or integration approach — reach out directly.